1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, in particular, to a semiconductor device having a capacitor which does not leak and a manufacturing method thereof.
2. Description of the Background Art
Conventionally, a film with a very good coverage, such as a silicon oxide film or a silicon nitride film made by means of a CVD (chemical vapor deposition) method, is used for the dielectric film of a capacitor. Therefore, a film of a uniform thickness can be formed even in the case that the lower electrode has a complex form. As for the structure of the complex lower electrode, a cylindrical structure, a thin structure, a structure where polysilicon is roughened, a trench structure, and the like, can be cited.
FIGS. 7 to 11 illustrate a process for a capacitor in a semiconductor device according to a prior art. First, a semiconductor substrate is provided below (see FIG. 11) and impurity regions formed in the semiconductor substrate and an insulating film 102, which covers a channel region, are formed. A contact plug 103 which contacts the above impurity regions is provided in the above insulating film 102. Next, a lower electrode layer 104 is formed so as to contact on the above contact plug 103 and insulating film 102 (FIG. 7). This lower electrode layer can be formed of a metal film, such as platinum. Next, the lower electrode layer is patterned by using a resist pattern, or the like, as a mask so as to form a storage node (lower electrode) 104a (FIG. 8).
Next, a dielectric film 105 is formed so as to cover the top surface and sidewalls of storage node 104a (FIG. 9). After this, a conductive film 106 for an upper electrode is formed so as to contact and cover the top surface and side surfaces of dielectric film 105 (FIG. 10). The semiconductor device shown in FIG. 11 is formed according to a capacitor process as described above. In FIG. 11, capacitor contact plug 103 makes a conductive connection between storage node 104a and an impurity region 114 in the semiconductor substrate.
In addition, a bit line contact 108 makes a conductive connection between a bit line 107 and an impurity region 113 provided in the semiconductor substrate. In addition, a transfer gate 109 usually used as a word line is formed of a gate insulating film 110 on a channel region (not shown) in the semiconductor substrate, a barrier metal layer 109b contacting and located above the gate insulating film and a metal layer 109a. 
In recent years, new materials of a large dielectric constant, which allow a charge of a higher capacitance to be stored, have been developed as capacitor dielectric films. Therefore, application of these new materials to a semiconductor device has begun to be examined. As for these new materials, a BST ((Ba, Sr)TiO3: barium strontium titanium oxide) film or an ST (SrTiO3: strontium titanium oxide) film can be cited.
Though these materials have high dielectric constants and can implement a high capacitance, there is a problem wherein the coverage of the lower electrode is low. In particular, materials which cannot be formed by means of CVD and which can only be formed by means of spattering have very low coverage.
In the case that a material of low coverage is utilized, for example in the case that the lower electrode is in a plurality of convex forms separated from each other, the occurrence of a thin portion in the dielectric film at a corner portion, or the like, cannot be avoided. For example, in the case that a dielectric film with poor coverage or a dielectric film with a strong tendency to form crystals is formed as the capacitor dielectric film, a portion where the film is thin easily occurs in a portion of a corner of the storage node, such as portion B in FIG. 11. When the film is too thin in such a portion of the dielectric film, it becomes a place where a leak of the charge stored in the capacitor occurs. In addition, when a dielectric film of a uniform thickness is provided in order to prevent the leak, the capacitance of the capacitor is lowered.
Purposes of the present invention are to provide a semiconductor device with a capacitor having a structure wherein there are no places that leak even in the case that a dielectric film of low coverage is thinly formed as well as to provide a process for the same.
A semiconductor device of the present invention is a semiconductor device provided with first and second capacitors adjoining each other, the respective lower electrode of which is electrically connected to impurity region in a semiconductor substrate and the respective upper electrode of which is electrically connected to an external wire. In this semiconductor device the first and the second capacitors, respectively, has lower electrode which contacts the top surface of an insulating layer formed on the semiconductor substrate and the top surface of plug wire running through the insulating layer, dielectric film which contacts the top surface of the lower electrode and which has peripheral sidewall surfaces that continue to the peripheral sidewall surfaces of the lower electrode, first upper electrode, which contacts the top surface of the dielectric film, and a second upper electrode, which contacts the top surface of the first upper electrode. The semiconductor device is further provided with a partition insulating film which contacts the top surface of the insulating film and which covers the sidewalls of the lower electrode and the dielectric film between the first and the second capacitors, wherein the second upper electrode contacts on the top surface of the partition insulating film.
In this structure, a dielectric film for a basic capacitor structure is formed of only a dielectric layer in a plane arranged on the lower electrode layer in a plane. Therefore, a dielectric film of poor coverage film or a dielectric film which has a strong tendency to form crystals does not cover lower electrodes of a complex form, such as those having corner portions. Therefore, no portions of the film become so thin so as to cause a leak. In addition, the dielectric film of the first and second capacitors can be formed at the same level. Therefore, individual capacitor can be patterned in a deposition layer which is broader in a plane. Therefore, a factor causing a large fluctuation of the film thickness in one capacitor can be eliminated as a result of this portions of an individual capacitor where the dielectric film is extremely thin do not occur and, thereby, a leak can be prevented. A dielectric material of a high dielectric constant, of which the coverage is poor, can be used in order to form this dielectric layer of a sufficient thinness and, thereby, a semiconductor device provided with a capacitor of high capacitance can be gained.
In the above described semiconductor device of the present invention, the partition insulating film can cover an area ranging from the lower end of the sidewalls of the first upper electrode to a predetermined level.
In this structure, it becomes easy to provide the second upper electrode over a plurality of capacitors without causing a leak. Therefore, it becomes possible to easily connect a plurality of capacitors through the second upper electrode.
In the semiconductor device of the present invention the partition insulating film can be made of an insulating film filled in to the gap between the first and the second capacitors.
In this structure individual capacitors can be separated from each other so as not to cause a leak in the individual capacitors.
In the above described semiconductor device of the present invention, the second upper electrode can be provided in a continuous form over the first and the second capacitors that are separated by the partition insulating film.
In this structure the upper electrodes of the plurality of capacitors can be easily connected. Accordingly, the freedom of arrangement of an external wire which is electrically connected to the second upper electrode of the capacitors can be enhanced.
In the above described semiconductor device of the present invention, the first upper electrode can be tapered so that the width of the first upper electrode becomes narrower towards the top.
In this structure a gap narrower than the minimum width in a photomechanical process can be provided between adjoining capacitors by carrying out etching to create tapering. As a result of this, the areas of the dielectric films can be broadened to the maximum. Thus, it becomes possible to further increase the capacitance of the capacitors.
A method of manufacturing a semiconductor device of the present invention is a method of manufacturing a semiconductor device with a plurality of capacitors, the respective lower electrode of which is electrically connected to impurity region in a semiconductor substrate and the respective upper electrode of which is electrically connected to an external wire. This process is provided with the step of forming a lower electrode layer which contacts the top surface of an insulating layer formed on a semiconductor substrate and plug wire provided in the insulating layer, the step of forming a dielectric layer on the lower electrode layer, the step of forming a first upper electrode layer on the dielectric layer, the step of forming a plurality of basic capacitor structures made of lower electrodes, dielectric films and first upper electrodes by patterning the lower electrode layer, the dielectric layer and the first upper electrode layer, the step of forming an insulating layer which fills in the gaps between the plurality of basic capacitor structures and which covers the first upper electrodes and the step of removing the upper layer portion of the insulating layer so as to form partition insulating films which separate the plurality of basic capacitor structures and so as to expose the first upper electrodes.
In this structure, a broad dielectric layer is formed on a flat and broad lower electrode layer, on which a dielectric film of each of the basic capacitor structures is defined. Therefore, fluctuation in the film thickness of the dielectric films rarely occurs so that dielectric films of a uniform thickness can be gained. Furthermore, since capacitors are patterned from this flat and broad deposition layer, portions where the dielectric film is extremely thin can be prevented from being included in the capacitors. As a result of this, a semiconductor device with capacitors having minimal leakage can be gained. In addition, by using a dielectric material of a high dielectric constant, capacitors of a high capacitance can be gained.
In the method of manufacturing a semiconductor device of the present invention, the step of forming a second upper electrode layer that is positioned so as to contact the first upper electrodes can be provided after the step of exposing the first upper electrodes.
In this configuration, individual capacitors can be easily connected through the above second upper electrode layer. Therefore, freedom of arrangement of an external wire to which the second upper electrode layer of the capacitors is connected can be enhanced.
In the method of manufacturing a semiconductor device of the present invention, the step of flattening the lower electrode layer can be provided after the step of forming a lower electrode layer and before the step of forming a dielectric layer.
When the thickness of the dielectric film is made to be extremely thin, for example, in order to make the capacitance large, the surface coarseness of the lower electrode layer becomes a problem. In the case that the surface coarseness is great, a portion occurs where the dielectric film is locally thin and, in some cases, a leak occurs. In the above described structure, a smooth surface of the lower electrodes can be gained by carrying out a flattening treatment, such as a CMP treatment, on the lower electrode layer so that a portion wherein a local leak occurs is not created, even in the case that the dielectric film is made to be extremely thin. The flattening treatment can be carried out through CMP polishing, or the like.
In the method of manufacturing a semiconductor device of the present invention, the step of flattening of the insulating layer on which the lower electrode layer is formed before the step of forming the lower electrode layer.
In this structure the flatness of the insulating layer becomes excellent so that the lower electrode layer, of which the flatness is excellent, can be formed on the insulating layer. Therefore, it becomes possible to form a dielectric layer of a uniform film thickness without carrying out a particular flattening treatment on the lower electrode layer.
In the method of manufacturing a semiconductor device of the present invention, the first upper electrodes can be patterned so as to be in tapered forms wherein the widths of the first upper electrode is narrower toward the top in the step of patterning for forming the basic capacitor structure.
In this structure, gaps which are narrower than the minimum width in the photomechanical process can be provided between adjoining capacitors by carrying out the etching for creating tapering. As a result of this, since the areas of the dielectric films can be broadened to the maximum, it becomes possible to further increase the capacitance of the capacitors.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.